View STA543SA_1059355.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

STA543SA
24W x 1 + 7W x 2 Triple Amplifier with DC Volume Control
PRELIMINARY DATA
Features
OUTPUT POWER CAPABILITY 24W x 1 + 7W x 2 @ VCC = 15V, RL = 4, THD = 10% LINEAR DC VOLUME CONTROL FOR EACH SINGLE CHANNEL MINIMUM EXTERNAL COMPONENTS COUNT: - NO BOOTSTRAP CAPACITORS - NO BOUCHEROT CELLS - INTERNALLY FIXED GAIN (20dB SE, 26dB BTL) ST-BY FUNCTION (CMOS COMPATIBLE) NO AUDIBLE POP DURING ST-BY OPERATIONS DIAGNOSTIC FACILITIES - CLIP DETECTOR - OUT TO GND SHORT - OUT TO VS SHORT - SOFT SHORT AT TURN-ON - THERMAL SHUTDOWN PROXIMITY Clipwatt 19

OVERRATING CHIP TEMPERATURE WITH SOFT THERMAL LIMITER VERY INDUCTIVE LOADS FORTUITOUS OPEN GND ESD

Description
The device is a class AB Audio amplifier assembled in the Clipwatt19 package; it is designed for high quality sound application. The STA543SA is a 3-channels audio amplifier with DC volume control dedicated for each single channel. It is a device suitable for 2.1 solution thank to its output configuration with two single ended channels and one bridge. The Short Circuit Protection, the Thermal Protection and the Diagnostics Functions are integrated in the device.
Protections

OUPUT AC/DC SHORT CIRCUIT SOFT SHORT AT TURN-ON
Order codes
Part number STA543SA Temp range, C 0 to 70 Package Clipwatt 19 Packing Tube
July 2005
CD00061065
Rev 2 1/23
www.st.com
23
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
STA543SA
Contents
1 Block diagram and Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 1.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 2.2 2.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Test board and Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Test board parts list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4
Evaluation Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1 4.2 Crcuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Evaluation Board Functional Description: . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.2.1 4.2.2 4.2.3 Input Cut-off frequency: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Output Cut-off frequency: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Crossover Network for SW: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5
General structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 5.2 5.3 5.4 5.5 5.6 5.7 Gain Internally Fixed to 20dB in Single Ended, 26dB in Bridge . . . . . . . . . . 15 Silent Turn On/Off and Muting/Stand-by Function . . . . . . . . . . . . . . . . . . . . 15 STAND-BY DRIVING (pin9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Output Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Rail-to-Rail Output Voltage Swing With No Need of Bootstrap Capacitors. . 15 Absolute Stability Without Any External Compensation. . . . . . . . . . . . . . . . . 16 BUILT-IN Shortcircuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.7.1 5.7.2 Diagnostic Facilities (Pin 12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Thermal Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.8 5.9
Handling of the diagnostic information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 PCB-Layout Grounding (general rules) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/23
CD00061065
STA543SA
6
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.1 Example (A): 2 channels Single Ended + 1Ch (BTL) . . . . . . . . . . . . . . . . . . 20
7 8
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CD00061065
3/23
STA543SA
1
1.1
Block diagram and Pins description
Block diagram
Figure 1. Block diagram
VCC 17 4 IN1 OUT1 6 VOL1 5 IN2 SVR 2 OUT2 VOL2 7 SVR 1 VCC 3
STBY
9
19
OUT3+
SVR SVR 15 IN3 18 OUT3-
13 VOL3 11 SVR 14 VOL_OUT S_GND 16 AMP_IN 8 SVR 10 PW_GND
12
DIAG
1.2
Pins description
Figure 2. Pins Connections (Top view)
19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
D04AU1552
OUT3+ OUT3VCC2 AMP_IN IN3 VOL_OUT VOL3 DIAG S_GND P_GND ST_BY SVR VOL2 VOL1 IN2 IN1 VCC OUT2 OUT1
4/23
CD00061065
STA543SA
Table 1.
N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1 Block diagram and Pins description
Pin description
Pin Name OUT1 OUT2 VCC IN1 IN2 VOL1 VOL2 SVR ST-BY P_GND S_GND DIAG VOL3 VOL_OUT IN3 AMP_IN VCC2 OUT3OUT3+ Pin Type OUTPUT OUTPUT POWER INPUT INPUT INPUT INPUT INPUT INPUT POWER POWER OUTPUT INPUT OUTPUT INPUT INPUT POWER OUTPUT OUTPUT Channel 1 output Channel 2 output Power supply Channel 1 input Channel 2 input Channel 1 volume control Channel 2 volume control Supply Voltage Rejection Stand-by Power ground Signal Ground Diagnostics Channel 3 volume control Channel 3 volume control output Channel 3 input Channel 3 amplifier input Power supply Channel 3 negative output Channel 3 positive output Function
CD00061065
5/23
2 Electrical specifications
STA543SA
2
2.1
Electrical specifications
Absolute maximum ratings
Table 2.
Symbol Vop Vs Ptot Tstg, Tj Vctr Top DC Supply Voltage Total Power Dissipation (Tcase = 70C) Storage and Junction Temperature Volume Control DC Voltage Operating Temperature
Absolute maximum ratings
Parameter Operating Supply Voltage Value 18 20 35 -40 to150 7 0 to 70 Unit V V W C V C
2.2
Thermal data
Table 3.
Symbol Rth j-case Rth j-amb
Thermal data
Parameter Thermal Resistance Junction to case Thermal Resistance Junction to ambient Max. Max. Value 2 45 Unit C/W C/W
2.3
Table 4.
Symbol Vs Id Vos
Electrical characteristics
Electrical characteristics (Refer to the test circuit, VS = 15V; RL = 4; f = 1kHz; Tamb = 25C unless otherwise specified).
Parameter Supply Voltage Range Total Quiescent Drain Current Output Offset Voltage Single Ended Bridge THD = 10%: RL = 4 Bridge Single Ended RL = 4, Single Ended, Po =0.1 to 4W Bridge, Po =0.1 to10W f = 1 kHz Single Ended f = 10 kHz Single Ended f = 1 kHz Bridge f = 10 kHz Bridge Single Ended and Bridge -250 -150 24 7 0.4 0.4 70 60 55 20 60 30 Test Condition Min. 8 Typ. Max. 18 150 250 150 Unit V mA mV
Po
Output Power
W W % % dB dB dB dB k
THD
Total Harmonic Distortion
CT
Cross Talk
Rin
Input Impedance
6/23
CD00061065
STA543SA
Table 4.
Symbol
2 Electrical specifications
Electrical characteristics (continued) (Refer to the test circuit, VS = 15V; RL = 4; f = 1kHz; Tamb = 25C unless otherwise specified).
Parameter Test Condition Min. Typ. Max. Unit
Single Ended, Vol Ctrl (Pins 6 Maximum Voltage Gain Internally and 7) > 4.5V Gv Fixed Bridge, Vol Ctrl (pin 13) > 4.5V (**) AMin Vol Attenuation at minimum volume Vol Ctrl < 0.5V Gv Voltage Gain Match Single Ended f = 20 to 22 kHz (play, max. volume) Single Ended Bridge f = 20 to 22 kHz (play, max. attenuation) Single Ended Bridge Rg = 0; f = 300Hz VST-BY = 0 to 1.5V
19 25 80
20 26
21 27
dB dB dB
0.5
dB
EN
Total Output Noise
500 600
V
250 500 50 80 90 100 1.5 3.5
V dB dB A V V 50 5 A mA A A 0.7 V C C C
SVR ASB ISB VSB VSB Istby Icd off Icd on Vdiag TW TM TS
Supply Voltage Rejection Stand-by Attenuation ST-BY Current Consumption ST-BY In Threshold Voltage ST-BY Out Threshold Voltage ST-BY Pin Current Clipping Detector Output Average Current Clipping Detector Output Average Current Voltage Saturation on DIAG Thermal Warning Thermal Muting Thermal Shut-down
Play Mode Vstby = 5V Max Driving Current Under Fault d = 1% (*) d = 5% (*) Sink Current at DIAG = 1mA 140 150 160 90 160
Note:
(*) DIAG Pulled-up to 5V with 10 k; RL = 4 (**) For channel 3: if used the input pin 16 (with 100nF decoupling) instead of pin 15 the voltage gain is always max. and it is independent from Volume Control.
CD00061065
7/23
3 Test board and Layout
STA543SA
3
Figure 3.
Test board and Layout
Test board
Figure 4.
PC boards and component layout
Component layout
Component side
Solder side
8/23
CD00061065
STA543SA
Figure 5. Test circuit
ON OFF ST-BY 1 2 3 R4 10K
3 Test board and Layout
VS + C9 +5V +5V
9 STBY
C10 0.1F
+ C11 1000F 25V PGND
10F 25V
17
VCC
VCC
3
IC1 STA540SA - STA543SA
C1 0.22F +5V IN1 4 IN1
R1 VOL. P1 CONTR.1 50K
270K C2 0.1F
JP1 6 VOL1 OUT1 1
C12
2200F 25V
+
OUT1
C3 0.22F IN2 5 IN2 PGND
+5V
R2 P2 VOL. CONTR.2 50K
270K C4 0.1F
JP2 7 VOL2 OUT2 2
C13
2200F 25V
+
OUT2
C5 0.22F IN3 15 IN3 JP5
+5V
R3 P3 VOL. CONTR.3 50K
270K C6 0.1F IN4
JP3 13 VOL3 OUT3+ 19
C14
2200F 25V
+
OUT3 (OUT3+)
JP4 14 VOL_OUT PGND
C7 0.22F 16 AMP_IN OUT318
C15
2200F 25V
+
OUT4 (OUT3-)
JP6 C8 47F 25V SGND 8
+ PW_GND
SVR
S_GND
11
10
DIAG
CD00061065
12
DIAG
9/23
3 Test board and Layout
STA543SA
3.1
Test board parts list
Table 5. Test board parts list Suggested Value
300k 10k 100k 0.1F 0.22F 47F 10F 0.1F 1000F 2200F DC Volume CTRL ST-BY TIME CONSTANT DC Vol. -CTRL Vol. -CTRL Bypass INPUT DC DECOUPLING RIPPLE REJECTION ST-BY TIME CONSTANT SUPPLY VOLTAGE BYPASS SUPPLY VOLTAGE BYPASS OUTPUT DC DECOUPLING
Components
R1, R2, R3 R4 P1, P2, P3 C2, C4, C6 C1,C3,C5,C7 C8 C9 C10 C11 C12,C13
Purpose
Table 6.
Jumper selection Purpose
DC Volume CTRL Volume CTRL OUT Bypass DC out Capacitors Closed Closed Closed connect BTL speaker Between Out 3+ And Out 3-
Jumpers
JP1, JP2, JP3 JP4 JP5, JP6
Connection
10/23
CD00061065
STA543SA
4 Evaluation Board
4
Evaluation Board
In addition to the Test Board shown in Figure 3. intended also to evaluate the STA540SA Amplifier, it is possible to order the dedicated STA543SA evaluation board of Figure 6. The PCB layout (single layer) is shown in Figure 7.
4.1
Crcuit description
With this board it is possible to amplify three analog signals Left, Right, Subwoofer coming from separated sources or to generate the BASS part to be sent to the Subwoofer via a passive crossover network. All the three channels have a Linear DC volume Control.
Figure 6.
Evaluation Board Schematic
+5V R1 +5V + C1 10F 25V ST-BY 17 9 3 U1 R2 C4 0.22F 4 +5V IN1 N.M. GND VCC C2 100nF + C3 1000F 25V 10K VS
SGND
IN1(L)
R3 SGND N.M.
100K VOL. CONTR. 1 P1
R4
300K 6 C6 100nF VOL1 OUT1 1 C5 + OUTL 1000F 25V
100K VOL. CONTR. 2 +5V R6 N.M. IN3(SW) C10 C11 N.M. P2 100K VOL. CONTR. 3 +5V C13 1F R8 300K C12 100nF 0.47F C8 0.22F R7 N.M. R5 300K C7 100nF IN2(R)
7
ST_BY
VCC2
VOL2
PGND
5
STA543SA
IN2
OUT2
2 C9
+
OUTR
1000F 25V
15
IN3
PGND
13
VOL3
OUT3+
19
OUT3+
14
VOL_OUT
OUT3-
18
OUT3-
16
AMP_IN
8 + C14 47F 25V
SVR S_GND P_GND DIAG
+5V
R9 10K DIAG
11
10
CD00061065
12
11/23
4 Evaluation Board
STA543SA
Figure 7.
Evaluation Board PCB and Component Layout
Component Layout
PCB
Table 7.
Part list
Recommended Value 10K Not mounted Not mounted 300K 100K pot. 10K 10uF 100nF 1000uF 220nF 470nF Not mounted 100nF 1000uF 1uF 47uF SVR Increase of SVR , increase of switch ON time Degradation of SVR Purpose St-By Circuit See notes See notes DC-Vol CTRL DC-Vol CTRL Open Collector Pull up St-by Circuit Supply Voltage Bypass Supply Voltage Bypass Input DC decoupling L/R Input DC decoupling Bass See notes DC Vol. bypass Output Dc decoupling Lower low freq Cutoff Higher low freq Cutoff Lower low freq Cutoff Lower low freq Cutoff Larger On/Off time Smaller On/Off time Danger of oscillations Danger of oscillations Higher low freq Cutoff Higher low freq Cutoff Larger than Recommended value Larger On/Off time Smaller then Recommended value Smaller On/Off time
Component R1 R2,R7 R3,R6 R4,R5,R8 P1,P2 R10 C1 C2 C3 C4,C8 C10 C11 C6,C7,C12 C5,C9 C13 C14
12/23
CD00061065
STA543SA
4 Evaluation Board
4.2
4.2.1
Evaluation Board Functional Description:
Input Cut-off frequency:
The input Cut-off frequency is set by the external capacitor (C4,C8,C10) values and by the internal Input Impedance Rin ( 30K typ) fi (cut-off) = 1 / 2 ( Ri x Ci)
for the suggested values we have Left/Right f i = 1 / 2 (30K x 220nF) = 24Hz SW fi = 1 / 2 (30K x 470nF) = 11Hz
4.2.2
Output Cut-off frequency:
The output Cut-off frequency is set by the DC decoupling capacitor placed in series to the speaker (C5,C9) value and by the Speaker Impedance
C5,C9 100uF 220uF 470uF 1000uF 2200uF 8ohm 199 90 42 20 9 6ohm 265 121 56 27 12 4ohm 398 181 85 40 18 Unit Hz Hz Hz Hz Hz
4.2.3
Crossover Network for SW:
with this board it's possible, when the Bass Audio Signal to be sent to CH.3 is not available from the Audioprocessor, to generate it with a simple Low Pass Filter composed by an RC network. The components to be added are R3,R6,C11: fo = 1 / 2 R3 (R4) x C11 example: for R3 = R4 = 4K7 we have C11 = 100nF 340Hz C11 = 220nF 150Hz C11 = 330nF 100Hz It is advisable at this point to modify the value of the DC decoupling capacitors in such a way to send to L and R speakers only the high frequencies. For example the frequency response shown in Figure 8. was obtained with Rl = 8ohm, C5=C9= 100uF, R3=R6= 4K7 and C11=220nF Note: In order to give the input freq response less sensitive to the spread in the Input Impedance (Rin parameter) , it is possible to add externally two resitors R2,R7 in parallel to Rin.
CD00061065
13/23
4 Evaluation Board
STA543SA
Frequency response
+20 +15 +10 +5 +0 -5 d B r A -10 -15 -20 -25 -30 -35 -40 -45 -50 10 20 50 100 200
Figure 8.
SW
L/R
R3=R6= 4k7 C11= 220nF C5=C9= 100uF Rl= 8ohm
500 Hz 1k 2k 5k 10k 20k
14/23
CD00061065
STA543SA
5 General structure
5
5.1
General structure
Gain Internally Fixed to 20dB in Single Ended, 26dB in Bridge
Advantages of this design choice are in terms of:

components and space saving output noise, supply voltage rejection and distortion optimization.
5.2
Silent Turn On/Off and Muting/Stand-by Function
The stand-by can be easily activated by means of a CMOS level applied to pin 9 through a RC filter. Under stand-by condition the device is turned off completely (supply current = 1mA typ.; output attenuation= 80dB min.). Every ON/OFF operation is virtually pop free. Furthemore, at turn-on the device stays in muting condition for a time determined by the value assigned to the SVR capacitor. While in muting the device outputs becomes insensitive to any kinds of signal that may be present at the input terminals. In other words every transient coming from previous stages produces no unplesantacoustic effect to the speakers.
5.3
STAND-BY DRIVING (pin9)
Some precautions have to be taken in the definition of stand-by driving networks: pin 9 cannot be directly driven by a voltage source whose curent capability is higher than 5mA. In pratical cases a series resistance has always to be inserted, having it the double purpose of limiting the current at pin 9 and to smooth down the stand-by ON/OFF transitions - in combination with a capacitor - for output pop prevention. In any case, a capacitor of at lest 100nF from pin 9 to S-GND, with no resistance in between, is necessary to ensure correct turn-on.
5.4
Output Stage
The fully complementary output stage was made possible by the development of a new component: the ST exclusive power ICV PNP. A novel design based upon the connection shown in Figure 9. has then allowed the full exploitation of its possibilities. The clear advantages this new approach has over classical output stages are as follows:
5.5
Rail-to-Rail Output Voltage Swing With No Need of Bootstrap Capacitors.
The output swing is limited only by the VCEsat of the output transistors, which are in the range of 0.3 (Rsat) each.
CD00061065
15/23
5 General structure
STA543SA
Classical solutions adopting composite PNP-NPN for the upper output stage have higher saturation loss on the top side of the waveform. This unbalanced saturation causes a significant power reduction. The only way to recover power consists of the addition of expensive bootstrap capacitors.
5.6
Absolute Stability Without Any External Compensation.
Referring to the circuit of Figure 9. the gain Vout/Vin is greater than unity, approximately 1+R2/ R1. The DC output (VCC/2) is fixed by an auxiliary amplifier common to all the channels. By controlling the amount of this local feedback it is possible to force the loop gain (A*) to less than unity at frequency for which the phase shift is 180. This means that the output buffer is intrinsically stable and not prone to oscillation. Most remarkably, the above feature has been achieved in spite of the very low closed loop gain of the amplifier. In contrast, with the classical PNP-NPN stage, the solution adopted for reducing the gain at high frequencies makes use of external RC networks, namely the Boucherot cells. Figure 9. The new output stage
5.7
BUILT-IN Shortcircuit Protection
Reliable and safe operation, in presence of all kinds of short circuit involving the outputs is assured by BUILT-IN protectors. Additionally to the AC/DC short circuit to GND, to VS, across the speaker, a SOFT SHORT condition is signalled out during the TURN-ON PHASE so assuring correct operation for the device it self and for the loudspeaker. This particular kind of protection acts in such a way to avoid the device is turned on (by ST-BY) when a resistive path (less than 16 ohms) is present between the output and GND. As the involved circuitry is normally disabled when a current higher than 5mA is flowing into the ST-BY pin, it is important, in order not to disable it, to have the external current source driving the STBY pin limited to 5mA.
16/23
CD00061065
STA543SA
5 General structure
5.7.1
Diagnostic Facilities (Pin 12)
The STA543SA is equipped with a diagnostic circuitry able to detect the following events:

Clipping in the output signal Thermal shutdown Output fault: - - - short to GND short to VS soft short at turn on
The information is available across an open collector output (pin 12) through a current sinking when the event is detected Figure 10. Clipping Detection Waveforms
A current sinking at pin 12 is provided when a certain distortion level is reached at each output. This function allows gain compression facility whenever the amplifier is overdriven.
5.7.2
Thermal Shutdown
In this case the output 12 will signal the proximity of the junction temperature to the shutdown threshold. Typically current sinking at pin 12 will start ~10C before the shutdown threshold is reached. Figure 11. Output fault waveforms
CD00061065
17/23
5 General structure
STA543SA
Figure 12. Fault waveforms
ST-BY PIN VOLTAGE 2V t OUT TO Vs SHORT OUTPUT WAVEFORM SOFT SHORT t OUT TO GND SHORT
Vpin 12
CORRECT TURN-ON FAULT DETECTION t CHECK AT TURN-ON (TEST PHASE)
D05AU1603
SHORT TO GND OR TO Vs
5.8
Handling of the diagnostic information
As different kinds of information is available at the same pin (clipping detection, output fault, thermal proximity), this signal must be handled properly in order to discriminate the event. This could be done taking into account the different timing of the diagnostic output during each case. Normally the clip detector signalling produces a low level at out 12 that present under faulty conditions: based on this assumption an interface circuitry to differentiate the information is the represented in the schematic of Figure 14. Figure 13. Waveforms
ST-BY PIN VOLTAGE
t
Vs OUTPUT WAVEFORM t
Vpin 12 WAVEFORM t CLIPPING
D05AU1604
SHORT TO GND OR TO Vs
THERMAL PROXIMITY
18/23
CD00061065
STA543SA
Figure 14.
5 General structure
5.9
PCB-Layout Grounding (general rules)
The device has 2 distinct ground leads, P-GND (POWER GROUND) and S-GND (SIGNAL GROUND) which are practically disconnected from each other at chip level. Proper operation requires that P-GND and S-GND leads be connected together on the PCB-layout by means of reasonably low-resistance tracks. As for the PCB-ground configuration, a star-like arrangement whose center is represented by the supply-filtering electrolytic capacitor ground is highly advisable. In such context, at least 2 separate paths have to be provided, one for P-GND and one for S-GND. The correct ground assignments are as follows: - - - - STANDBY CAPACITOR, pin 9 (or any other standby driving networks): on S-GND SVR CAPACITOR (pin 8): on S-GND and to be placed as close as possible to the device. INPUT SIGNAL GROUND (from active/passive signal processor stages): on S-GND. SUPPLY FILTERING CAPACITORS (pins 3,17): on P-GND. The (-) terminal of the electrolytic capacitor has to be directly tied to the battery (-) line and this should represent the starting point for all the ground paths.
CD00061065
19/23
6 Thermal Information
STA543SA
6
Thermal Information
In order to avoid the thermal protection intervention that is placed at Tj=150C (Thermal Muting) or Tj=160C (Thermal Shut-down), it is important the Heat Sinker RTH (C/W) dimensioning. The parameters that influence the dimensioning are:

Maximum dissipated power for the device (Pd max) Max.Thermal resistance Junction to case (RTHj-c) Max. Ambient temperature Tamb. Max
There is also an additional term that depends on the Iq (quiescent current).
6.1
Example (A): 2 channels Single Ended + 1Ch (BTL)
VCC= 14.4V, Rload = 2x 4 (SE) + 1x 4 (BTL) Pout = 2 x 7W + 1 x 24W 2Vcc Vcc P d ma x = 2 ----------------- + ---------------- = 2 2.62 + 10.5 = 15.76W 2 2 2 R1 R1 150 - T a mbmax 150 - 50 (Heat sink) RTHc-a = --------------------------------------- - R TH j - c = --------------------- - 2 = 4.3 C/W P dm ax 15.76 NOTE: The values found gives an heatsinker that is dimensioned to sustain the max. dissipated power, but as explained in the Application Note (AN1965) the heatsinker can be smaller when we consider the real application where a musical program is used. If we consider the so called "Average Listening Dissipated Power" concept we obtain a value that is about 40% less respect the Pdmax (see AN1965 for reference). So in the examples (A) and we will obtain the value for the Average Listening Dissipated Power that is respectively: -Example (A) : 15.76 W - 40% = 9.45W that gives RTHc-a = 8.5C/W In Figure 15. is shown the Power Derating curve for the device Figure 15. Power Derating Curve
Pd(W)
2
2
30 25
2 1) Infinite 1 3 4 2) 3.5C/W 3) 5C/W 4) 7C/W 5) 10C/W
20 15 10 5 0 0 20
5
40
60
80
Tamb (C)
100
120
140
160
20/23
CD00061065
STA543SA
7 Package information
7
Package information
Figure 16. Clipwatt 19 Mechanical Data & Package Dimensions
mm DIM. MIN. A B C D E F F1 G G1 H1 H2 H3 L L1 L2 L3 M M1 10.7 19.85 17.9 14.55 11.0 5.50 2.54 2.54 11.2 0.421 0.87 17.87 1.00 18.0 12.0 18.6 0.781 0.704 0.572 0.433 0.217 0.100 0.100 0.441 0.49 0.47 0.50 0.15 1.50 0.55 0.58 0.1 1.13 18.13 0.034 0.703 0.039 0.708 0.480 0.732 0.019 0.018 TYP. MAX. 3.2 1.05 0.006 0.061 0.022 0.020 0.004 0.044 0.713 MIN. TYP. MAX. 0.126 0.041 inch
OUTLINE AND MECHANICAL DATA
Clipwatt19
7390917 A
CD00061065
21/23
8 Revision history
STA543SA
8
Revision history
Date 12-July-2005 28-July-2005 Revision 1 2 Initial release. Modified figgs 6 and 7. Changes
22/23
CD00061065
STA543SA
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
CD00061065
23/23

▲Up To Search▲

Price & Availability of STA543SA

	To Download STA543SA Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .